1. Field of the Invention
The present invention relates in general to a flash EEPROM cell, and more particularly to a split gate flash EEPROM cell having an anisotropic pillar silicon layer, and also to a method for fabricating the same.
2. Description of the Prior Art
Generally, an EEPROM cell means an electrically erasable programmable read-only memory device.
In realizing this flash EEPROM cell, shrinkability is greatly restricted by over-erasing issue and the reliability of a tunneling oxide film.